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Data transfer is critical in communication networks. On the Transmitter side, the messages are encoded, and on the Receiver side, they are decoded. Due to many interruptions in the communication connection, data may become distorted during message transmission. As a result, the decoder tool must also have the ability to correct any errors that may occur. This paper deals with designing and implementing a convolutional encoder and Viterbi decoder which play a major role in the building blocks of digital communication. Because of its error detection and correction capabilities, the Viterbi algorithm has a wide range of applications. Viterbi decoding is a strong forward error correcting technique. With a specific path management unit, the Viterbi Decoder is designed for higher decoding speed and smaller routing space. Verilog HDL is used to build the system. Xilinx 9.1 is used for simulation and Altera Quartus is used for synthesis.
Keywords:
Viterbi Algorithm, Trellis diagram, Convolutional encoder, Branch metric unit, Traceback unit, Hamming distance.
Cite Article:
"Implementation of Viterbi Decoder for Error Detection and Correction", International Journal of Science & Engineering Development Research (www.ijrti.org), ISSN:2455-2631, Vol.7, Issue 8, page no.1170 - 1174, August-2022, Available :http://www.ijrti.org/papers/IJRTI2208187.pdf
Downloads:
000202485
ISSN:
2456-3315 | IMPACT FACTOR: 8.14 Calculated By Google Scholar| ESTD YEAR: 2016
An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.14 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator
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