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International Journal for Research Trends and Innovation
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ISSN Approved Journal No: 2456-3315 | Impact factor: 8.14 | ESTD Year: 2016
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Impact Factor : 8.14

Issue per Year : 12

Volume Published : 8

Issue Published : 84

Article Submitted : 7736

Article Published : 3946

Total Authors : 10256

Total Reviewer : 547

Total Countries : 81

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Authors Name: S Pranava Koundinya , Dr. Kiran V
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Published Paper Id: IJRTI2210092
Published In: Volume 7 Issue 10, October-2022
Abstract: Today's electronics, including DSP and VLSI applications, depend on adders, which are essential parts of every device. Numerous electrical devices employ high-speed adders called Parallel Prefix Adders (PPA). PP Adders have lower latency because adds happen more frequently with less waiting time in between. The addition function must be executed by any control system, whether it be digital, analogue, or both. For the digital system to run swiftly and precisely, adders must be in good working order. In numerous logical and mathematical procedures, adders are employed. Given that improving the performance of digital systems is the goal of VLSI system design research, there is a strong incentive to examine and assess adder architectures. The region typically degrades the adder block's performance, though. In accordance with the parameters of power, latency, and transistor count independently, this paper constructs and analyses a 4-bit Kogge Stone adder using pass transistor logic (PTL) and transmission gate logic (TGL). Finally, an 8-bit Kogge Stone adder is created and simulated using the best performing architecture using Cadence Virtuoso in 45nm Technology.
Keywords: Pass Transistor Logic, Transmission Gate Logic, Kogge Stone Adder, Very Large Scale Integrated design, Parallel Prefix Adder, Cadence Virtuoso, and 45nm Technology.
Cite Article: "KOGGE STONE ADDER USING TRANSMISSION GATE LOGIC", International Journal of Science & Engineering Development Research (, ISSN:2455-2631, Vol.7, Issue 10, page no.670 - 679, October-2022, Available :
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ISSN: 2456-3315 | IMPACT FACTOR: 8.14 Calculated By Google Scholar| ESTD YEAR: 2016
An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.14 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator
Publication Details: Published Paper ID: IJRTI2210092
Registration ID:184441
Published In: Volume 7 Issue 10, October-2022
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Page No: 670 - 679
Country: Bengaluru, Karnataka, India
Research Area: Electronics & Communication Engg. 
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ISSN: 2456-3315
Impact Factor: 8.14 and ISSN APPROVED
Journal Starting Year (ESTD) : 2016

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