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International Journal for Research Trends and Innovation
International Peer Reviewed & Refereed Journals, Open Access Journal
ISSN Approved Journal No: 2456-3315 | Impact factor: 8.14 | ESTD Year: 2016
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Impact Factor : 8.14
Issue per Year : 12
Volume Published : 10
Issue Published : 113
Article Submitted : 18245
Article Published : 7789
Total Authors : 20583
Total Reviewer : 750
Total Countries : 142
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| Paper Title: | Implementation of low power full adder using cmos technology |
| Authors Name: | vikash D , P S niji , yoganath J , vinoth P , bala santhos J |
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IJRTI_185475
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| Published Paper Id: | IJRTI2303088 |
| Published In: | Volume 8 Issue 3, March-2023 |
| DOI: | |
| Abstract: | A crucial part of digital and VLSI systems is played by adders. The use of arithmetic operations is crucial in digital systems. The entire study in VLSI systems is focused on reducing the transistor scale to enforce any other digital system. This suggested design is implemented by various logic system types, each of which plays a specific function in the hybrid system. This structure uses a hybrid Full Adder cell with a single bit. Using a 16-nm CMOS hybrid full adder, the proposed approach is studied. Based on the findings of the simulation, the suggested architecture shows significant efficiency in both power consumption and delay. The simulation's output indicated that the data channel architecture for contemporary high speed central processor units used a full adder circuit. This type of hybrid full adder, which is mostly employed in nanotechnology applications, decreases latency while enhancing efficiency. For a 1 -V supply at 16-nm technology, the average power consumption of 1.5317µWwithmoderately low delay of 10.4078n was determined to be incredibly low. Compared to earlier full adder designs, this form of adder offers considerable advantages in power, high speed. |
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| Cite Article: | "Implementation of low power full adder using cmos technology", International Journal of Science & Engineering Development Research (www.ijrti.org), ISSN:2455-2631, Vol.8, Issue 3, page no.500 - 504, March-2023, Available :http://www.ijrti.org/papers/IJRTI2303088.pdf |
| Downloads: | 000205052 |
| ISSN: |
2456-3315 | IMPACT FACTOR: 8.14 Calculated By Google Scholar| ESTD YEAR: 2016 An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.14 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator |
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Published Paper ID: IJRTI2303088
Registration ID:185475
Published In: Volume 8 Issue 3, March-2023
DOI (Digital Object Identifier):
Page No: 500 - 504 Country: tiruppur, tamilnadu, India Research Area: Electronics & Communication Engg. Publisher : IJ Publication Published Paper URL : https://www.ijrti.org/viewpaperforall?paper=IJRTI2303088 Published Paper PDF: https://www.ijrti.org/papers/IJRTI2303088 |
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ISSN: 2456-3315
Impact Factor: 8.14 and ISSN APPROVED,
Journal Starting Year (ESTD) : 2016
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