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ISSN Approved Journal No: 2456-3315 | Impact factor: 8.14 | ESTD Year: 2016
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Impact Factor : 8.14
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| Paper Title: | Design and Implementation of 4*4 DADDA multiplier using 45nm CMOS technology |
| Authors Name: | Jogu Sreeja , Kurukuntla Srima , Chakali Parameshwari , G. Samatha |
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IJRTI_201458
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| Published Paper Id: | IJRTI2503143 |
| Published In: | Volume 10 Issue 3, March-2025 |
| DOI: | |
| Abstract: | Multiplication is a crucial operation in digital systems, with applications spanning signal processing, cryptography, and embedded computing. Conventional multipliers, such as array multipliers, suffer from high power consumption, large area, and increased delay due to the excessive number of partial products and multiple addition stages. To overcome these challenges, optimized multiplication techniques such as the Dadda multiplier have been introduced. This paper presents the design and analysis of a 4×4 Dadda multiplier implemented using 45nm CMOS technology, focusing on performance parameters such as area, speed, and power consumption. The Dadda multiplier employs a multi-stage reduction technique to efficiently minimize the number of partial products and optimize the summation process, leading to reduced computational complexity. The implementation using 45nm technology demonstrates significant improvements in power efficiency and speed compared to conventional array multipliers. Simulation results indicate that the Dadda multiplier reduces power consumption and area usage while achieving faster computation, making it an efficient choice for modern digital circuits. |
| Keywords: | Dadda Multiplier,4*4 multiplication,CMOS VLSI Design,45nm Technology,Partial product reduction,carry save adder,carry propagate adder,full adder and half adder,power delay product,propagation delay,leakage power reduction,cadence virtuoso and synopsys tools,DRC &LVS verfication |
| Cite Article: | "Design and Implementation of 4*4 DADDA multiplier using 45nm CMOS technology ", International Journal of Science & Engineering Development Research (www.ijrti.org), ISSN:2455-2631, Vol.10, Issue 3, page no.b319-b327, March-2025, Available :http://www.ijrti.org/papers/IJRTI2503143.pdf |
| Downloads: | 000324 |
| ISSN: |
2456-3315 | IMPACT FACTOR: 8.14 Calculated By Google Scholar| ESTD YEAR: 2016 An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.14 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator |
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Published Paper ID: IJRTI2503143
Registration ID:201458
Published In: Volume 10 Issue 3, March-2025
DOI (Digital Object Identifier):
Page No: b319-b327 Country: Rangareddy, Telangana, India Research Area: Electronics & Communication Engg. Publisher : IJ Publication Published Paper URL : https://www.ijrti.org/viewpaperforall?paper=IJRTI2503143 Published Paper PDF: https://www.ijrti.org/papers/IJRTI2503143 |
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ISSN: 2456-3315
Impact Factor: 8.14 and ISSN APPROVED,
Journal Starting Year (ESTD) : 2016
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