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ISSN Approved Journal No: 2456-3315 | Impact factor: 8.14 | ESTD Year: 2016
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Impact Factor : 8.14

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Paper Title: Low Power and Security Trade-offs in ASIC Verification: A Practical Approach
Authors Name: Aparna Mohan
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IJRTI_205536
Published Paper Id: IJRTI2507169
Published In: Volume 10 Issue 7, July-2025
DOI: https://doi.org/10.56975/ijrti.v10i7.205536
Abstract: The increasing demand for energy-efficient and secure hardware in modern computing platforms has spotlighted a critical challenge in ASIC design: balancing low power consumption with robust security verification. This review systematically explores recent research at this intersection, summarizing over a decade of innovation in power-aware security analysis, co-verification frameworks, and practical implementations. We present a conceptual block diagram, a proposed theoretical model, and experimental evidence quantifying trade-offs using side-channel vulnerability metrics, verification coverage, and post-silicon behavior. Future directions including AI-based optimizers, lifecycle-aware security, and post-quantum logic are discussed. The goal is to equip ASIC designers and verification engineers with actionable insights and frameworks to optimize both power and trust in next-generation chips.
Keywords: ASIC verification, low power design, hardware security, side-channel attacks, co-verification, DVFS, clock gating, formal verification, post-silicon validation, secure chip design
Cite Article: "Low Power and Security Trade-offs in ASIC Verification: A Practical Approach", International Journal for Research Trends and Innovation (www.ijrti.org), ISSN:2455-2631, Vol.10, Issue 7, page no.b476-b481, July-2025, Available :http://www.ijrti.org/papers/IJRTI2507169.pdf
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ISSN: 2456-3315 | IMPACT FACTOR: 8.14 Calculated By Google Scholar| ESTD YEAR: 2016
An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.14 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator
Publication Details: Published Paper ID: IJRTI2507169
Registration ID:205536
Published In: Volume 10 Issue 7, July-2025
DOI (Digital Object Identifier): https://doi.org/10.56975/ijrti.v10i7.205536
Page No: b476-b481
Country: Chennai, Tamil Nadu, India
Research Area: Engineering
Publisher : IJ Publication
Published Paper URL : https://www.ijrti.org/viewpaperforall?paper=IJRTI2507169
Published Paper PDF: https://www.ijrti.org/papers/IJRTI2507169
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ISSN: 2456-3315
Impact Factor: 8.14 and ISSN APPROVED, Journal Starting Year (ESTD) : 2016

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